Commodore 128D User Manual Page 24

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Address Description
$D500 CR Configuration Register
$D501 PCRA Preconfiguration Register A
$D502 PCRB Preconfiguration Register B
$D503 PCRC Preconfiguration Register C
$D504 PCRD Preconfiguration Register D
$D505 MCR Mode Configuration Register
$D506 RCR RAM Configuration Register
$D507 P0L Page 0 pointer low
$D508 P0H Page 0 pointer high
$D509 P1L Page 1 pointer low
$D50A P1H Page 1 pointer high
$D50B SVR System Version Register
$FF00 CR Configuration Register
$FF01 LCRA Load Configuration Register A
$FF02 LCRB Load Configuration Register B
$FF03 LCRC Load Configuration Register C
$FF04 LCRD Load Configuration Register D
Table 7: The MOS 8722 MMU registers
techniques if you want to determine the real amount of memory banks on the system. Actually, the only difference
between MMU expanded systems and unexpanded ones is that the banks 2 and 3 map to banks 0 and 1 on stock
C128’s.
The Configuration Register (Table 8) reflects the memory configuration state upon reading, and whenever you
write to it, the new memory configuration will be selected immediately. If you have selected the I/O block at $D000,
you can access the CR at $D500, but the address $FF00 is available in all memory configurations. Generally, the
processor addresses $FF00$FF04 are always mapped to the MMU.
There are also Preconfiguration registers, which let you to change configurations easier. If you write anything
to a Load Configuration Register, the value in the corresponding Preconfiguration Register will be loaded to the
Configuration Register, thus selecting that memory configuration. Upon reading, the Load Configuration Registers
reflect the state of the corresponding Preconfiguration Register. These registers are normally used by the BASIC
interpreter, so if you want your routines to coexist with the BASIC, it is probably best to leave those registers alone.
The Mode Configuration Register (Table 9) lets you to change processors and operating modes, among others. All
bits in this register act as outputs, but they can be used as inputs, too. If you wrote a ‘1 to any bit, external hardware
could pull the line down, and the bit would output 0’. For instance, you can make the operating system to think
that the 40/80 key is depressed by clearing the high bit of this register. Also, if you make your own routine to select
the C64 mode, you will able to assert the EXROM or GAME, if you want to play with different C64 mode memory
configurations without having to hook anything to the computer. Also, note that you can use other banks than the
default 0 in the C64 mode, if you disable common memory and remember to select the video bank.
The 64 kB video bank can be selected with the RAM Configuration Register (Table 10). Its other purpose is
selecting the size and location of the Common RAM block, a memory area that defaults to bank 0 in spite of the
processor RAM bank settings in the Configuration Registers.
Finally, the page relocation registers let you to relocate the processor pages zero and one (addresses $00$FF and
$100$1FF) anywhere in the memory. Well, actually the 8502’s addresses 0 and 1 always map to its built-in I/O
register. In addition to that, the MMU defaults the page relocation bank to 0 if you are using common memory at
bottom of memory. To relocate the zero page, first write the memory bank (03) to $D508, and then write the memory
page number to ($D507). The stack page (page 1) uses the addresses $D509 and $D50A.
3.7 Hints for programming in C128 mode Machine Language
It is best to use sixteen or thirty-two kilobytes of common memory on the MMU when using the PIA expansion. This
way you can hold your program in bank 0 in the lowmost or highmost sixteen kilobytes, or both, and you can easily
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