Commodore 128D User Manual

Memory expansions for the Commodore 128Marko Mäkelä Pekka PessiApril 17, 1994[last essential modification on December 22, 1999]∗†‡§As the Commodore 128

If the screen shows up normally, you may not (yet) have made any mistakes. If it does not show up at all, youhave to find possible cut-outs and shorts.

Since I had finished the daughter board, I bent up the pins 2 and 5 of the U14 multiplexer chip, and connected itspins 1–3 and 5 to the daughter board

U7M8722MMUIC5M8722MMUIC974F32U974F32U204066IC84066IC774F00IC6’138U3’13863TA154TA145TA136TA127TA118TA109TA910TA811CAS112CAS013MS214MS115MS034VSS4840/80

wreck C128 lying around, you can try ordering the chip from Jameco Electronics. The chip shouldn’t cost more than10 USD. You can reach them at:Orders

Electronic ComponentsSymbol DescriptionIC5 MOS 8722IC6 74LS138IC7 74F00IC8 4066IC9 74F32IC10–IC25 80256 or compatibleR3, R4 68 Ω resistorOther PartsQu

and 12 from the 74F00 to the IC6’s pins 15 and 13, and connect the 74F00’s pins 11 and 10 together. Then solder thepin 9 to the 8502’s pin 10, A3. Sol

3.1.1 PIA’s location in address spaceThe PIA’s data bus and E, RESET and R/W signals have been connected directly to the 6526 chip. Similarly are theR

3.1.4 Startup settings for the PIA expansionIn order to enable the operation of the machine, each of the four segments must be mapped to a unique memo

values written to 57280 will go to the data direction register. Inputs have the corresponding data direction register bitsreset, and outputs have them

3.4 Initializing the PIA expansionThe second MMU, if any, does not need any initialization. In contrary to that, the PIA does. Before using thatexpans

Contents1 Some basics 31.1 Expansion memory in 16 kB blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.2 Memory chips .

You may want to use an array instead. That will save both space and processing time but lose generality. Someonemay have CB1 or CB2 in use,17and chang

Peripheral Register A(Peripheral Lines PA7–PA0)Bits Description7–4 Block Selection, Segment 13–0 Block Selection, Segment 0Data Direction Register ABi

Control Register ABit(s) Description7 IRQA1 Interrupt FlagGoes high on active transition of CA1; Automatically cleared by MPU read ofPeripheral Regist

Control Register BBit(s) Description7 IRQB1 Interrupt FlagGoes high on active transition of CB1; Automatically cleared by MPU read ofPeripheral Regist

Address Description$D500 CR Configuration Register$D501 PCRA Preconfiguration Register A$D502 PCRB Preconfiguration Register B$D503 PCRC Preconfiguration

Configuration Register formatBit(s) Description7–6 Processor RAM bank (0–3)5–4 Contents of the area $C000–$FFFF00 Kernal ROM01 Internal Function ROM10

RAM Configuration RegisterBits Function7–6 Video RAM bank (0–3)5–4 RAM block (0–3)3–2 Common RAM selection00 Common RAM block disabled01 Common RAM blo

solution. The lowmost kilobytes are free RAM, and it can be utilized by switching memory blocks. But the benefit ofthe extra memory decreases, as you c

80 NEXT I90 POKE PIA+2,254:POKE DD,PEEK(DD) OR 3:POKE V+24,23:POKE V+17,27The extra memory can be used as a store of high resolution pictures as well.

a nnnn cmd or. nnnn cmdAssembles instruction cmd to memory addressnnnn.b bb ffSelects a block. The bb holds the block number,and ff is a flag. If it is

1 Some basicsThis article describes two memory expansions: an expansion that adds two new memory banks to the Commodore 128,doubling its memory space,

problems, you should replace the ROM chip that holds the BASIC and Kernal ROMs with an EPROM containing thepatched Kernal. The RAM disk routines are i

HIRAM line low, so that the interrupt vectors will always be fetched from RAM. The idea of the expansion is that theprogram runs in some other memory

RAM pool (bank 0)MPU’s RAM VIC-IIe’s RAM----¾¾¾¾$00000$04000$08000$0C000$10000$14000$18000$1C000$20000$24000$28000$2C000$30000$34000$38000$3C000$40000

4164 41256 ª  ª` `1 116 162 215 153 314 144 413 135 512 126 611 117 710 108 89 9NC MA8VSSVSSD DCAS CASW WQ QRAS RASMA6 MA6MA0 MA0MA3 MA3MA2 MA2MA4 M

64 kilobit DRAMs required 128 refresh cycles every 2 milliseconds, now the 256 kb chips need 256 cycles but every4 ms.Whenever you select a row addres

U1M6526IC1MC6821IC2’153IC3’15162PA03PA14PA25PA36PA47PA58PA69PA710PB011PB112PB213PB314PB415PB516PB617PB718PC24FLAG1VSS19TOD22R/W23CS25Φ226D727D628D529D

U14 74LS257A ª`11621531441351261171089MUXVDDTA15AECA7TA12VMA7A4TA14VMA4A6 TA13VMA6 A5VSSVMA5Figure 4: Pin-out for the multiplexer chip U14Electronic

MOS 6526 CIA MC 6821 PIA ª  ª` `1 12 23 34 45 56 67 78 89 910 1011 1112 1213 1314 1415 1516 1617 1718 1819 1920 2021 2122 2223 2324 2425 2526 2627 2